1. Field of the Invention
The present invention relates to an ohmic electrode, suitable to a semiconductor device, having a base material of a p-type group III-V (group 3B-5B) semiconductor, particularly a p-type InP based semiconductor, and a semiconductor device employing the electrode.
2. Description of the Prior Art
In general, a multilayer electrode consisting of Auxe2x80x94Zn metals is employed as an ohmic electrode (hereinafter also referred to simply as an electrode) for semiconductor devices such as a photodiode, a laser diode or a light emitting diode, for example, having a base material of a p-type group III-V semiconductor, particularly an InP based semiconductor. In this electrode, Au is employed for the following reason:
After depositing an Auxe2x80x94Zn metal film, heat treatment is performed in the temperature range of 400 to 450xc2x0 C. At this time, Au reacts with the InP based semiconductor base material and diffuses into the base material through a native oxide film present on the surface thereof. Consequently, electrical contact is attained between the base material and the Au metal film.
In order to attain electrical contact between the base material and the metal film as described above, a metal reacting with the base material and thermally diffusing in a high temperature range, as described above must be selected as the material forming the metal film. In the electrode, further, Zn is employed for the following reason:
Zn diffuses into the base material due to the aforementioned heating, to form a p-type doped layer of high concentration on the surface of the base material. Thus, holes can tunnel through a Schottky barrier defined on the interface between the metal film and the base material after deposition of the metal film. Consequently, Zn serves as a p-type impurity carrier for the base material.
If the metal film consists of only Au, the surface of the base material will have a low p-type carrier concentration (concentration of about 1018 cmxe2x88x923 in general) although electrical contact between the metal and the base material is attained as described above. Thus, an ohmic electrical contact resistivity (hereinafter simply referred to as contact resistivity) characteristic is not obtained on the contact interface between the metal film and the base material. Therefore, Zn which is a p-type impurity must diffuse into the surface of the base material for improving the carrier concentration on this surface.
Attempts of providing Au/Zn/Au metal electrodes on p-type InP based semiconductor base materials for reducing contact resistivity on the interfaces therebetween are presented in some literature. Sumitomo Denki, No. 141 (September 1992), pp. 100 to 104 presents an exemplary electrode employing an impurity-free InP based semiconductor crystal for a base material. This electrode is formed by depositing fourth and fifth layers consisting of Ti/Au on first to third layers having controlled thicknesses and thereafter alloying the layers by heating the same in a nitrogen atmosphere at a temperature of 435xc2x0 C. However, this electrode has such a problem that protrusions of the alloyed layers (hereinafter referred to as reaction layers) on the surface of the base material reach an operating layer of a semiconductor device, to result in a failure of the semiconductor device.
For example, J. Electron. Mater., Vol. 20 (1991), p. 237 presents an electrode having a shallow reaction layer and small contact resistivity obtained by additionally stacking a Pd layer on the same system metal layers. Further, Appl. Phys. Lett., Vol. 66 (1995), p. 3310 describes an electrode having a shallow reaction layer and small contact resistivity obtained by forming Ge/Pd/Zn/Pd metal layers, and Appl. Phys. Lett., Vol. 70 (1997), p. 99 describes an electrode having a shallow reaction layer and small contact resistivity obtained by forming Pd/Sb/Zn/Pd metal layers.
Each of these electrodes requires heat treatment at a high temperature exceeding 400xc2x0 C. In general, however, a p-type electrode and an n-type electrode are simultaneously arranged in the same semiconductor base material wafer, and when heating an Au/Ge/Ni metal film widely employed as the n-type electrode at such a high temperature, for example, the components of this film diffuse into the base material and deeply infiltrate into the base material wafer to disadvantageously deteriorate the essential practical characteristics of the wafer. While an Au layer is provided as the uppermost layer in order to suppress sheet resistance of a part connected to an external device and improve bondability of a connection wire (increase connection strength), diffusion of Au may abnormally progress to deteriorate the characteristics of the semiconductor wafer if the heating temperature in film formation exceeds 400xc2x0 C. To this end, Japanese Patent Laying-Open No. 3-16176 (1991), for example, describes an attempt providing a stopper layer consisting of Ti or Cr between an Au/Zn/Au electrode and an uppermost layer of Au for suppressing excess diffusion of Au. Also in this case, however, the electrode must be heated at a high temperature of 430 to 450xc2x0 C.
In order to reduce the heating temperature, transition metals must be employed for the electrode as already proposed by the inventors in Japanese Patent Application No. 10-18843 (1998), for example. The transition metals react with an oxide film formed on the surface of a base material at a lower temperature as compared with Au. When employing these metals, reaction generally progresses at a low temperature of not more than 400xc2x0 C. As a result, an electrode having a low contact resistance value is obtained. Further, the aforementioned problem in the case of simultaneously arranging a p-type electrode and an n-type electrode can also be solved. In order to perform heat treatment at a relatively low temperature as described above, reactivity between the oxide film provided on the semiconductor base material and the transition metals employed for the electrode is important.
In order to bear no relation to the oxide film provided on the surface of the base material, the oxide film is previously removed in general. In this case, the oxide film is removed by chemical etching, for example, and thereafter sputtering is performed with an ion beam or plasma in a vacuum chamber, for example. Each of Japanese Patent Laying-Open Nos. 62-60218 (1987) and 58-141529 (1983) presents a method applying a molecular beam of Sb or the like onto a compound semiconductor base material for removing an oxide film from the surface of the compound semiconductor base material. In the method of removing the oxide film by chemical etching, an oxide film of about several nm is formed on the surface of the base material exposed to the atmosphere after removal of the oxide film, and hence application of a molecular beam is required in any case. However, the method employing sputtering with an ion beam or plasma is undesirable since charged particles damage the surface of the base material to deteriorate the electric characteristics thereof. Such influence by the charged particles is remarkable particularly when the reaction layer has a small thickness. A similar problem arises also in the Pd/Zn/Pd electrode proposed by the inventors in Japanese Patent Application No. 10-18843. In other words, it is important to control the thickness, the composition etc. of a native oxide film formed on the surface of the base material.
In J. Vac. Sci. Technology, Vol.12, No. 3 (1994), p. 1419, Fischer et al. propose a method of preventing oxidation of the surface of the base material after etching. According to this proposal, the base material is dipped in an ammonium solution so that the surface chemically adsorbs sulfur (S) atoms, thereby preventing the surface from oxidation. However, the inventors have confirmed that this method is insufficient for preventing oxidation since an S atom layer is unstable. Further, the solution generates hydrogen sulfide gas or precipitates powder of a polysulfide, leading to a possibility of contaminating the peripheral environment.
Japanese Patent Publication No. 5-81048 (1993) presents an ohmic electrode having a small forbidden bandwidth provided with an alloyed layer consisting of a mixed crystal prepared by depositing, when a layer containing Al is present on an InP base material, for example, a first layer consisting of only Sb and a second layer containing Au on this layer and thereafter performing heat treatment at 450xc2x0 C. for three minutes thereby reacting the layers. Also in this method, however, the heat treatment temperature is so high that the reaction layer is deepened and the performance of the base material wafer may be deteriorated in a device also employing the aforementioned n-type semiconductor electrode.
In the aforementioned prior art, therefore, the composition and the structure of the oxide film present on the surface of the semiconductor base material cannot be controlled while forming a thin reaction layer by heating at a low temperature of not more than 400xc2x0 C. simultaneously with formation of the electrode, and it is difficult to control contact resistance of the ohmic electrode and the heat treatment temperature. Thus, an electrode having an excellent ohmic characteristic cannot be obtained.
An object of the present invention is to control the composition and the structure of an oxide film provided on a surface of a semiconductor base material and reduce contact resistance by reducing a heat treatment temperature.
An ohmic electrode according to the present invention consists of a plurality of metal layers stacked on a p-type group III-V semiconductor crystal base material (hereinafter simply referred to as a base material). A first layer as viewed from the side of the base material consists of a group VB (group 5B) element, and a second layer and subsequent layers are successively stacked on the first layer.
The first layer preferably contains at least one element particularly selected from a group of Sb, Bi and As as the group VB element, and the thickness of the first layer is preferably in the range of 2 to 10 nm. The second layer preferably contains Zn, and preferably consists of Zn and a transition metal. Further, a third layer consisting of a refractory metal and a fourth layer consisting of Au are preferably stacked on the second layer. Preferable thicknesses of the third and fourth layers are 20 to 200 nm and 100 to 500 nm respectively. In particular, a base material consisting of a group III-V semiconductor crystal of either InP or GaxIn1. xAsyP1xe2x88x92y, where x and y represent zero or positive numbers less than 1 and y represents a number satisfying y=1-2.1x, can be selected as a preferable base material.
A method of manufacturing an ohmic electrode according to the present invention includes steps of first depositing a first layer consisting of a group VB element on a substrate consisting of a p-type group III-V semiconductor crystal and successively depositing a second layer and subsequent layers on the first layer thereby forming a laminate consisting of a plurality of metal layers and heat-treating the laminate in the temperature range of 300 to 400xc2x0 C.
The present invention also includes a method of implementing the aforementioned various preferable modes when depositing each layer on the base material. Further, the present invention also includes a semiconductor device having the aforementioned ohmic electrode.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following be detailed description of the present invention when taken in conjunction with the accompanying drawings.